Adam Holmes PhD

Quantum Error Correction and Quantum Information Research Scientist

NVIDIA

Adam Holmes PhD featured image

Adam is a quantum error correction and quantum information research scientist, interested in designing and characterizing new quantum error correcting codes, protocols for performing encoded logic, QCVV methods for characterizing physical qubits in QEC-relevant ways, architectures supporting wide ranges of quantum applications, and designing efficient quantum algorithms. He completed his undergraduate education at Cornell University in physics, and his Ph.D. at the University of Chicago in Professor Fred Chong’s research group. He spent several years at Intel Labs in the quantum theory and architecture group, and most recently spent five years with HRL Laboratories. There, he worked on many programs ranging from DARPA’s Quantum Benchmarking program designing efficient accelerated quantum-classical workloads, to QEC and architecture projects, and to multi-qubit QCVV for designing reduced error models for exchange-only silicon spin qubits.

Diamond Sponsor Speaker

Presentation Title:

Designing the Accelerated Quantum Supercomputer With AI and Digital Twins

Presentation Abstract:

Scaling from today’s noisy quantum devices to fault‑tolerant quantum computers is a qubit fabrication problem but critically is fast becoming a systems integration problem. As quantum processors grow, the dominant bottlenecks shift to real‑time calibration, quantum error correction, and low‑latency classical orchestration, all of which demand tight coupling between QPUs, GPUs, CPUs, and networking. In this talk, we present an emerging blueprint for an accelerated quantum supercomputer, where ultra‑low‑latency quantum–classical interconnects enable real‑time feedback, GPUs and AI drive decoding and calibration at scale, and unified programming models allow hybrid workflows to span hardware seamlessly. We discuss how accelerated emulation, AI‑assisted control and decoding, and heterogeneous system design are redefining what it means to build a scalable quantum computer, and how these capabilities collectively bridge the gap from NISQ-era demonstrations to truly fault‑tolerant, scientifically useful quantum systems. We describe a unified design process and platform encapsulated by Quantum Digital Twins.