Peter Onufryk is a Fellow in the Silicon Engineering Group (SiG) at Intel, recognized for his leadership in high-performance computing and interconnect standards. He holds over 40 issued patents and has architected numerous chips, boards, and systems. Peter co-founded NVM Express (NVMe), Universal Chiplet Express (UCIe), and currently serves as President of Ultra Accelerator Link (UALink), driving open standards for scalable AI fabrics. Prior to Intel, he was a Fellow at Microchip’s Data Center Solutions unit, leading storage product architecture. He also held engineering leadership roles at Integrated Device Technology (IDT) and was a research staff member at AT&T Bell Labs. Peter earned his Ph.D. in Electrical and Computer Engineering from Rutgers University and an MSEE from Purdue University.
Presentation Title:
Accelerating Scientific Discovery with UCIe and Open Chiplet Ecosystems in Post-Exascale Computing
Presentation Abstract:
The Universal Chiplet Interconnect Express (UCIe) standard introduces a modular approach to chip design, enabling interoperability across components and vendors. This paper explores how an open chiplet ecosystem can advance high-performance computing beyond the exascale era by supporting the co-design of domain-specific accelerators and improving integration of AI into modeling and simulation workflows. These architectures can significantly reduce time-to-solution. Key challenges include achieving consistent interface standards, ensuring system security, and optimizing the interaction between hardware and software. Addressing these issues is essential to realizing the full potential of chiplet-based systems. Open standards and collaborative development will be critical to building scalable, efficient platforms that meet the growing demands of scientific discovery.